IEICE Transactions on Information and Systems
Online ISSN : 1745-1361
Print ISSN : 0916-8532
Special Section on Reconfigurable Systems
FPGA Implementation of Human Detection by HOG Features with AdaBoost
Keisuke DOHIKazuhiro NEGIYuichiro SHIBATAKiyoshi OGURI
Author information
JOURNAL FREE ACCESS

2013 Volume E96.D Issue 8 Pages 1676-1684

Details
Abstract

We implement external memory-free deep pipelined FPGA implementation including HOG feature extraction and AdaBoost classification. To construct our design by compact FPGA, we introduce some simplifications of the algorithm and aggressive use of stream oriented architectures. We present comparison results between our simplified fixed-point scheme and an original floating-point scheme in terms of quality of results, and the results suggest the negative impact of the simplified scheme for hardware implementation is limited. We empirically show that, our system is able to detect human from 640×480 VGA images at up to 112FPS on a Xilinx Virtex-5 XC5VLX50 FPGA.

Content from these authors
© 2013 The Institute of Electronics, Information and Communication Engineers
Previous article Next article
feedback
Top